FPGA/ASIC Design Engineer

Are you an FPGA/ASIC Design Engineer looking to join one of the top Aerospace and Defense Industry ?

Are you looking to further your career and grow?

Do you have experience in a proven track record of implementing complex algorithms targeting ASIC/FPGAs?

If you answered yes to those three questions, then today!

Acara Solutions seeks highly qualified candidates to work onsite with our client in Camden, NJ. Interested?

Here's what you'd do:

• The FPGA/ASIC Design Engineer will be responsible for the architecture, implementation, verification/validation through Software integration tests for delivery of complex FPGAs AND/OR ASIC systems.
• This is a key, high-impact, high-visibility role that ensures the robust quality and delivery of Communication products for National Security.
• Develop architectures for implementing high-throughput complex designs involving Cryptographic Algorithms (VHDL) with high-speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (E.g., Xilinx MPSOC) and ASICs.
• Responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++-based SW-driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.
• The client has deployed state-of-the-art EDA flows/methodologies, including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA, including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), and Catapult (HLS).

Here's what you'll get:

Pay rate: $90.00 - $125.00 / hour.

Hours: 9/80 hrs/Week. (1 st shift).

Length: Temp to Direct (5 Months).

Sound like a good fit?

TODAY

About Acara Solutions

Acara is a premier provider of recruiting and workforce solutions, helping companies compete for talent. With a legacy of needs in various industries worldwide, we partner with clients, listen to them, and customize visionary talent solutions that drive desired business outcomes. We leverage decades of experience to deliver contingent staffing, direct placement, executive search, and workforce services worldwide.

Job Requirements

Required Skills / Qualifications:

• Bachelor's Degree in Science or Electrical Engineering or Computer Science
• Minimum 3 years of experience with a proven track record of implementing complex algorithms targeting ASIC/FPGAs
• Minimum 3 years of experience in VHDL >5 yrs, FPGA design/debug, Xilinx FPGA / EDA-Vivado.
• Minimum 3 years of experience in hands-on multiple complex designs, arch/design/verification/Synthesis/STA.

Preferred Skills / Qualifications:

• Master's Degree in Science or Electrical Engineering or Computer Science.
• High-Level Synthesis (HLS) with Vivado,
• Embedded SW C++ (OOP) and System Verilog Assertions (SVA)
• Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet)
• Excellent Analytical/debugging skills
• Good verbal, written, and presentation skills.
• Working with the Ethernet protocol (not just instantiating the IP).
• Mentor EDA CDC/Lint/AC/RDC.

Additional Information:

• Upon offer of employment, the individual will be subject to a background check and a drug screen.
• Active Secret DoD Clearance
• In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire.
• Under the International Traffic in Arms Regulations (ITAR), all employees assigned to this client must provide documentation verifying their status as a 'U.S. Person,' as defined in ITAR clause 120.15. A U.S. Person is a protected individual under the anti-discrimination provisions of U.S. immigration laws.

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are equal opportunity employers. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.